1. Field of the Invention
The present invention relates to a sense amplifier circuit for a semiconductor memory device, and more particularly, to a current sensing amplifier circuit.
2. Description of Related Art
FIG. 1 is circuit diagram of a conventional current sensing amplifier circuit for a semiconductor memory device. First and second input current signals I1 and I2 are converted into voltage signals at first and second input nodes N1 and N2 by PMOS transistors Q1 and Q2, respectively. Then, the voltages of the first and second input nodes N1 and N2 are amplified by the positive feedback operations of PMOS transistors Q3 and Q4 and then output to the first and second output nodes N3 and N4.
The voltage levels of the first and second output signals O1 and O2 are determined by the size ratios of PMOS transistors Q3 through Q6. Accordingly, in order to increase the voltage levels of the first and second output signals O1 and O2 in the conventional current sense amplifier circuit, the size of the PMOS transistors Q3 through Q6 must be adjusted or the amount of current of the first and second input signals I1 and I2 must be increased.
FIG. 2 illustrates the simulation results of the output signals O1 and O2 obtained by amplifying the difference between the input signals I1 and I2 in the conventional current sense amplifier circuit of FIG. 1. However, in the conventional current sense amplifier circuit, when the current values of the input signals I1 and I2 are low, the sensing capability of the circuit is lowered. In addition, when the operational voltage is lowered or when a parasitic capacitance increases, the sensing capability is also lowered.